The present invention relates generally to wafer stage structures for use in wafer processing apparatus, and more particularly to a wafer stage suitable for processing at high temperatures (ranging from about 200 to 500xc2x0 C.).
In recent years, certain materials including but not limited to ruthenium and its oxides or platinum or the like are thought to be the top-rated candidates for the capacitor electrode material of semiconductor devices of the next generation, owing to congeniality with currently available capacitor dielectric films high in dielectric constant and the like. In addition, materials which are considered to be employable as gate dielectric films in place of silicon oxides may include zirconium oxides and hafnium oxides or else whereas PZT (Pb(Zr,Ti)O3) and BST ((Ba,Sr)TiO3) are being considered for use as capacitor dielectric films. In this way, various kinds of xe2x80x9cnewxe2x80x9d materials are under consideration for use as prospective semiconductor device materials. Unfortunately these new materials are thermally and chemically stable in nature and thus stay extremely low in volatilityxe2x80x94in this respect, these are called non-volatile materials among experts in the semiconductor device art.
It is thus inevitable for performing etching treatment of these nonvolatile materials to maintain the temperature of a wafer being presently processed at high temperatures. Although in prior known etch processing apparatus or equipment it is a standard way that the wafer temperature is set to range from a low temperature of approximately xe2x88x9250xc2x0 C. up to about 100xc2x0 C., this temperature range is deemed insufficient in order to successfully etch the above nonvolatile materials due to the chemical stability thereof. Thus it is required that the nonvolatile materials be processed or micromachined within a high temperature range of from 200xc2x0 C. to 500xc2x0 C.
To realize a processing apparatus for processing wafers at such high temperatures, it is essential to employ a wafer stage capable of not only heating up wafers at high temperatures but also performing temperature control for establishment of a uniform wafer temperature distribution while increasing responsibility even in cases where heat input from a plasma is present.
A method for controlling the temperature of a wafer being processed with good responsibility is disclosed in Published Japanese Patent Application No. 7-176601 (JP-A-7-176601), wherein a gas gap space is provided between a pedestal for support of a wafer and its associative heat source and heat sink being provided thereunder for controlling the pressure of a gas being introduced into this gas gap space to thereby control the wafer temperature.
Another approach is disclosed in JP-A-2001-110885, wherein a heat transfer gas chamber capable of sealing and exhausting gases is provided between a support member for holding a wafer and a cooling member for performing cooling while further providing a heating element(s) on the support member side to thereby maintain the wafer at a high temperature.
With the example taught from the above-identified Japanese document JP-A-7-176601, in order to seal a gas in a gap space as provided between the pedestal for support of a wafer and the heat sink, the pedestal and heat sink are welded together; or alternatively, these are fixed with an O-ring interposed therebetween. In case the pedestal and heat sink are fixed together by welding techniques, whenever the wafer-supporting pedestal is replaced with a new one due to its lifetime or accidental failures or the like, a replacement range tends to become wider resulting in an increase in complexity of works required therefor. Additionally the connection due to welding suffers from a limitation to usable materialsxe2x80x94that is, both the pedestal and the heat sink are strictly required to be made of metals only. Alternatively in the case of fixation using the O-ring interposed, a usable temperature range is limited by the heat resistance temperature of such O-ring so that its upper limit stays merely at 200xc2x0 C., or more or less.
The example found in JP-A-2001-110885 is similar to that of JP-A-176601 in that it discloses therein a method for welding together a support member for support of a wafer and a cooling member or alternatively clamping them together using bolts with an O-ring sandwiched therebetween, wherein this approach suffers from similar problems to those stated supra.
Additionally with this example, a method for improving a wafer in-plane temperature distribution is shown, wherein, for the purpose of improving the uniformity of a wafer temperature in the area of a wafer surface, a region with a variable height is provided within the region of a recess portion as provided in a cooling member causing thermal conductance between the cooling member and support member to have a distribution, thereby to improve the wafer in-plane temperature distribution. However, with such an arrangement, in the event that a cooling member structure capable of realizing an optimized temperature distribution is employed in the case of a certain use temperature, the wafer in-plane temperature distribution can often vary at other use temperatures. This phenomenon poses a serious problem in particular in the case of usage at a high temperature of 400xc2x0 C. or 500xc2x0 C. This can be said because heat release or xe2x80x9cescapexe2x80x9d of via radiation from the wafer stage relatively increases in the temperature region of 400xc2x0 C. or 500xc2x0 C. and thus serves as the cause of deterioration of the wafer in-plan temperature distribution. Inherently it is desirable that the temperature distribution of the wafer stage be kept uniform in a wide temperature range. To this end, it is advantageous that such heat release from the wafer stage is less whereas heat delivery between it and the cooling member stays uniform in the plane. However, in this example, no teachings are found as to methodology for suppressing the heat release from the wafer stage. The present invention was made in view of these problems to provide a wafer stage capable of uniformly maintaining the temperature distribution of a wafer at high temperatures within a wide temperature range. The invention also provides a wafer processing method with virtually no risks of giving obstruction to the wafer due to a temperature change during wafer processing using the wafer stage.
To solve the foregoing problems the present invention employs the following means.
In a wafer stage suitable for use in a wafer processing apparatus which comprises a liquid cooling jacket with a built-in coolant fluid circulation path and a ceramic plate that has therein a heater and an electrode for electrostatic chuck use and is attached to overlie the liquid cooling jacket and which is operable to perform wafer processing while letting the wafer be mounted on the ceramic plate, the liquid cooling jacket is arranged so that the ceramic plate is attached through a coolant gas circulating gap as formed on or above the liquid cooling jacket while letting heat-resistant seal materials be disposed between the liquid cooling jacket and the ceramic plate, the seal materials containing therein an elastic or resilient body or bodies for sealing the coolant gas. The ceramic plate is attached to the liquid cooling jacket by more than one adhesive clamping element made of zirconia ceramic material in accordance with a feature of the present invention, and any one of the heater and the electrode for electrostatic chuck includes a cylindrical plug as built in the ceramic plate and a stem-like terminal with a spring member insertable into the cylindrical member being engaged therewith, in accordance with another feature of the present invention.